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AI chips

AI chips are the processors that train and run AI models: GPUs from Nvidia, AMD and Intel, custom accelerators such as Google's TPUs, and NPUs in PCs. This page tracks the chips themselves, their memory and software, who designs and manufactures them, and the supply limits that decide how many get built.

15 stories · updated Oct 14

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Key facts

Checked Oct 23

NPU requirement for Copilot+ PCs: Many Windows AI features require an NPU that can run at 40+ TOPS
Nvidia Vera Rubin NVL72 in production: Available on CoreWeave's cloud, announced September 30, 2026; CoreWeave says Cognition is the first customer running production workloads on it
Microsoft Maia 300: Detailed October 12, 2026: 288 GB of HBM4 in eight stacks, 18 TB/s of memory bandwidth, compute dies on TSMC N2P; built for LLM inference
Intel GPU D270: Announced October 12, 2026 (GPU D-series, formerly Crescent Island): up to 480 GB of LPDDR5X per card, for AI inference; customer sampling underway
AMD Helion: Introduced October 12, 2026: open rack design with up to 32,768 EPYC CPU cores, or CPU nodes combined with Instinct MI350P GPU nodes; configurations planned for November 2026
TSMC Q3 2026: Reported October 15, 2026: revenue US$46.72 billion (NT$1,494.24 billion); 3nm 33%, 5nm 28%, 2nm 8% and 7nm 10% of wafer revenue
AWS TorchNeuron: Native PyTorch backend for Trainium2 and Trainium3, open source under Apache 2.0; public beta from October 20, 2026
Google TorchTPU: Native PyTorch stack for TPUs, co-developed with Meta's PyTorch team and open source on GitHub under Apache 2.0; Google Cloud announcement dated October 21, 2026
Nvidia DSX POD: Introduced October 21, 2026: containerized Vera Rubin AI factory reference design; partners plan deliveries in early 2027
Nvidia supply-chain capacity: October 21, 2026: substrate capacity for Nvidia products to rise 2.5x over three years; SPIL targets 15x optical-engine capacity for co-packaged optics by mid-2027

Latest on AI chips

Hardware · NewsIntel GPU D270: Intel's inference GPU trades HBM for up to 480 GB of LPDDR5XAt the OCP Global Summit on October 12, 2026, Intel named its Crescent Island accelerator the GPU D270: an air-cooled 350 W PCIe card with 1.3 petaflops of FP8, 160 GB of LPDDR5X on Intel's own card and up to 480 GB on partner cards. Customer sampling has started; Intel hasn't given a launch date.Oct 14·4 min read

Hardware · NewsMicrosoft Maia 300 AI chip: 288 GB of HBM4, 2nm compute and a 40% tokens-per-megawatt claimOn October 12, 2026, Microsoft unveiled Maia 300, its third in-house AI accelerator, built for inference and due in multi-gigawatt Azure deployments from 2027. The specs, the efficiency claim, and what's still unverified.Oct 13·5 min read

Hardware · NewsAMD Helion: an open rack design for agentic AI with up to 32,768 Zen 6 coresAMD introduced Helion on October 12, 2026, an OCP-based rack blueprint that fills a rack with EPYC 'Venice' CPUs to run AI agents, or mixes in up to 16 Instinct MI350P GPUs. What's in it, who's building it, and when it ships.Oct 13·5 min read

Hardware · NewsNvidia's Vera Rubin reaches customer production as AMD buys an AI labCoreWeave says Cognition is the first customer running production work on Vera Rubin NVL72. Two days earlier, AMD agreed to buy World Labs for about $8.2 billion in stock.Oct 9·4 min read

Hardware · ExplainerWhat an NPU actually does, and why the TOPS number on your laptop matters less than you thinkCopilot+ PCs need a 40-TOPS 'AI engine'. Here's what that chip accelerates, which apps really use it, and why tools like Ollama mostly ignore it.Oct 9·7 min read

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